Neon
WLCSP Inspection & Metrology

Up to 50,000 UPH for devices ≤1 x 1 mm
Up to 5% higher inspection yield.

Neon™ inspection & metrology platform for next generation WLCSP and QFN is optimized for small, fragile semiconductors used in automotive, consumer, industrial, computing and mobility applications. A completely integrated solution offering flip and non-flip process, detaping to tape process, multi-taping output and full 6-sided inspection.

Market Leading Inspection Yield with Uncompromised Throughput

Neon inspection & metrology platform can handle fragile wafer-level chip scale products at high-speed, maintaining high operational efficiency while inspecting small devices down to 0.2 x 0.4 mm in size. It features extended process integration capabilities and can be configured with infrared and visual micro-scale defect inspection modules. Available in 16 or 32 pickup arms for process optimization. It is also equipped with an external cassette loader unloader to integrate with factory robots for customers adopting Industry 4.0 initiatives.

Up to 50,000 UPH for devices ≤1 x 1 mm (45,000 ≤2 x 2 mm) with HR Visible or Infrared Top, Bottom and Sidewall Inspection. Run WLCSP and QFN devices and processes on the same system.

Neon also features Cohu’s DI-Core Data Intelligence System providing real-time equipment monitoring and data analytics for Industry 4.0/Factory Automation.

Neon is designed to provide our customers with the best price/performance ratio in the industry, targeting semiconductors used in handset, high bandwidth memory, and small consumer electronics applications for high volume die sort needs.

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6-sided Optical and Infrared Inspection

Less than 1% Over-Rejection Rate

Up to 70% Throughput Improvement

Key Features

50K UPH in Tape incl. 6-sided Inspection

Up to 50,000 UPH for devices ≤1 x 1 mm (45,000 ≤2 x 2 mm) with HR Visible or Infrared Top, Bottom and Sidewall Inspection.

Package Sizes

0.2 x 0.4 mm to 12 x 12 mm packaging handling. Down to 70 μm Ultra-Thin Die picking technology.

Distinguish Micro-cracks from Scratches

WLCSP sidewall inspection. High-resolution images combined with dedicated micro-crack algorithm for defect detection down to 5 μm. Down to 1 μm crack detectability with Infrared inspection.

Advanced Vision with Infrared Technology

Ability to see through silicon, inspecting the structure underneath the surface; top, bottom, side and in-tape infrared inspection for improved production yield.

Unique Force Limitation at High-speed

Optimized for small form-factor processing at high-speed and yield.

Artificial Intelligence

AI algorithms enabling pattern recognition and precise defect classification.

Throughput Boosters

Combining True Map and Twin Wafer can increase throughput up to ~70%. Second wafer table to parallelize processes while turret is in production. Real wafer map creation in one picture.